Qualcomm’s new chips might be what Wear OS needs to turn around — if they actually deliver
Google’s Wear OS may be one of the oldest smartwatch platforms, but it’s been plagued with issues and shortcomings, even to the chagrin of its most ardent fans. Part of that problem has been the lackluster hardware Wear OS smartwatches are typically saddled with. In what may be a familiar claim, Qualcomm says that its new Snapdragon W5+ Gen 1 and W5 Gen 1 will help solve that problem, consuming half as much power and delivering twice the performance as its prior generation wearable chips. This is a pretty familiar promise at this point — that a new chipset will finally make good what ails Wear OS — but the technical argument is more convincing now.
4nm + 22nm (co-processor)
4x A53 1.7GHz, 1x Cortex M55 250MHz (co-processor)
A702 1GHz, 2.5D GPU (co-processor)
1x LPDDR4 2133 MHz
Ethos-U55 ML processor
Release 13 LTE, Cat 1 bis
Dual ISP, EIS 3.0
Caveat all this with a dose of “we’ll see what it’s actually like when it’s in a smartwatch,” but Qualcomm’s new W5+ Gen1 does offer some substantial improvements, like a jump all the way to a modern 4nm node. Qualcomm wouldn’t tell me precisely which foundry it’s using, but this is a multi-generation leap from the 12nm node on the primary SoC that the 4100+ used. A smaller node can offer benefits like improved performance and clock speeds, as well as a physically smaller design — that’s actually pretty handy in a wearable, where even sub-mm savings can mean stuffing in a slightly bigger battery.
On top of that, the low-power co-processor on the W5+ Gen1 is also getting a node improvement, jumping from 28nm to 22. Qualcomm is particularly proud of the power savings it has managed to include in the co-processor while simultaneously moving more operations onto it. In a briefing, Qualcomm told us that this is the first time it’s built a wearable chipset without any individual components or IP blocks just taken from its mobile chips.
If you’re not familiar with this sort of “hybrid” heterogeneous architecture, Qualcomm’s recent wearable chips essentially have two sub-chips inside them one for high-power full-fat operations, one for low-power tasks that can be done more efficiently. They interface with different operating systems, too. The “big” chip does Wear OS stuff, and the co-processor uses FreeRTOS, a lower-power software system meant for embedded devices that can do basic operations and feed data back to the bigger system when and as required. Poking around the Play Store on your wrist to download an app, for example, is a more power-intensive operation, and the big-boy SoC will handle that sort of thing. But basic activity tracking, audio workloads, notifications, sensor tracking — all that can be done with a separate low-power system.
The prior Wear 4100+ already had a co-processor for some of those workloads, but Qualcomm has expanded its functionality, giving it hardware to handle Bluetooth and machine learning workloads. Supplementing that, Qualcomm has what it calls “low-power islands” that are sort of partitioned off parts of the primary SoC that can be accessed without kicking it all the way on, letting a wearable perform operations that require GPS or Wi-Fi data in a reduced power mode compared to using the bigger chip. New low-power modes (hibernation and deep sleep — both surprisingly similar to how they work on something like a laptop) further reduce the amount of power that the primary SoC uses when it’s sitting idle.
Qualcomm is deeply insistent that the power savings the W5+ Gen1 will see are the best it’s ever delivered in a single-generation upgrade. We’re told that the question of power consumption was the primary driver behind every change the company made, down what Qualcomm claims is the lowest LTE standby power consumption in the entire industry — augmented by a single global LTE modem that will work everywhere.
The biggest benefit is the number of tasks that can be done using just the low-power part of the chipset. With a new dedicated machine learning core in the low-power co-processor, a lot of things that used to need the bigger processor to work won’t wake it, like measuring your heart rate, SPO2, ECG, machine learning-powered fall detection, and the expected stuff like the always-on display, music playback, hotword detection, etc.
Ultimately, Qualcomm says that certain battery sizes (~600mAh) should see a whole extra day of battery life, and all wearables should benefit from a 50% gain in battery life, given typical workloads. These are lofty claims, and we’ll have to see how they bear out in actual hardware, but maybe we’ll have Wear OS devices that can actually provide a whole day of battery life with the screen on the whole time.
There will be two versions of this new chip: One with and one without the low-power co-processor. The non-plus W5 Gen1 will have to use its primary processor for more tasks, but it also sounds like it’s primarily bound for very specific use cases (like enterprise devices), the Chinese market, or applications where a device manufacturer has its own co-processor it would like to use instead. Oppo is on deck to be the first to use it with a product launching in August.
The first US-bound device with the full-fat version of the chip will be an upcoming Mobvoi Ticwatch. Qualcomm tells us that there are 25 customer designs in the pipe, and it has two reference designs of its own that manufacturers can check out. Qualcomm wouldn’t give us specifics outside “customers pay for the value we bring to the market,” but it sounds like these new chips may also be more expensive, so devices using them could come at a premium.
I can’t tell you if the Snapdragon W5+ Gen1 is Wear OS’s savior or just a too-long name we’ll remember with disappointment in a few years, but the technical improvements Qualcomm claims to have made sound like they should at least help improve battery life and performance, helping to fight two of the platform’s biggest hardware issues. But consider me at least a little skeptical in the meantime — we’ve heard these promises before.
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